Prerequisites: COMP 264 and COMP 271.
Introduction to digital logic and Verilog. Design and implementation of a CPU pipeline. Processor design, instruction set design, and addressing. Control structures and microprogramming. Memory management, caches, and memory hierarchies. Interrupts and I/O structures. Instruction dependencies and hazards. Design synthesis on FPGAs.
Outcomes: Ability to design complex digital systems using hierarchical organization and implementation in Verilog; Ability to reason about dependencies in an instruction sequence and how dependencies create pipeline hazards.
Introduction to digital logic and Verilog. Design and implementation of a CPU pipeline. Processor design, instruction set design, and addressing. Control structures and microprogramming. Memory management, caches, and memory hierarchies. Interrupts and I/O structures. Instruction dependencies and hazards. Design synthesis on FPGAs.
Outcomes: Ability to design complex digital systems using hierarchical organization and implementation in Verilog; Ability to reason about dependencies in an instruction sequence and how dependencies create pipeline hazards.